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Physical Design and Implementation Engineer, CPU

at Google

India Senior Posted 2026-04-21

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About this role

Develop all aspects of Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high PPA designs. Manage block and full-chip level physical implementation and QoR (power, timing, area). Minimum qualifications: Bachelor's degree or equivalent practical experience. 8 years of experience in areas of physical design. Experience in working on at least two chip tape outs. Preferred qualifications: Experience in high performance designs like CPUs, GPUs etc. Experience in performance, or power analysis and optimization.

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