resu·mail

Lead Design Engineer

at Cadence

Pune, India Manager Posted 2026-04-23

Don't apply into the void — reach the hiring manager

ResuMail finds the recruiters and hiring managers behind this Lead Design Engineer role at Cadence, drafts a personalised outreach email, and schedules the send — so your application actually gets seen.

Reach the hiring manager ›

About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills. We’re doing work that matters. Help us solve what others can’t.

How to get this job at Cadence

  1. Don't rely on the portal. Cold applications for a role like Lead Design Engineer land in a pile of hundreds. A direct, personalised message to the hiring manager or a referrer is the fastest way in.
  2. Find the right person. ResuMail surfaces the actual recruiters and hiring managers at Cadence — not a generic careers inbox.
  3. Send tailored outreach. ResuMail drafts an email personalised to your resume and this role, then paces and schedules sends so you stay out of spam.
  4. Follow up. One polite nudge after 5–7 days roughly doubles reply rates — scheduled for you.

Reach Cadence's hiring managers today.

Free to start. No credit card. Built for Indian job seekers.

Start free with ResuMail ›